This invention relates to the field of isolation systems for use in selectively isolating electrical circuits from one another. More particularly, this invention relates to techniques for minimizing power dissipation in DC holding circuitry for a communication system that may include isolation systems having capacitor-coupled isolation barriers. This invention is useful in, for example, telephony, medical electronics and industrial process control applications.
Electrical isolation barriers can be identified in many industrial, medical and communication applications where it is necessary to electrically isolate one section of electronic circuitry from another electronic section. In this context isolation exists between two sections of electronic circuitry if a large magnitude voltage source, typically on the order of one thousand volts or more, connected between any two circuit nodes separated by the barrier causes less than a minimal amount of current flow, typically on the order of ten milliamperes or less, through the voltage source. An electrical isolation barrier must exist, for example, in communication circuitry which connects directly to the standard two-wire public switched telephone network and that is powered through a standard residential wall outlet. Specifically, in order to achieve regulatory compliance with Federal Communications Commission Part 68, which governs electrical connections to the telephone network in order to prevent network harm, an isolation barrier capable of withstanding 1000 volts rms at 60 Hz with no more than 10 milliamps current flow, must exist between circuitry directly connected to the two wire telephone network and circuitry directly connected to the residential wall outlet.
In many applications there exists an analog or continuous time varying signal on one side of the isolation barrier, and the information contained in that signal must be communicated across the isolation barrier. For example, common telephone network modulator/demodulator, or modem, circuitry powered by a residential wall outlet must typically transfer an analog signal with bandwidth of approximately 4 kilohertz across an isolation barrier for transmission over the two-wire, public switched telephone network. The isolation method and associated circuitry must provide this communication reliably and inexpensively. In this context, the transfer of information across the isolation barrier is considered reliable only if all of the following conditions apply: the isolating elements themselves do not significantly distort the signal information, the communication is substantially insensitive to or undisturbed by voltage signals and impedances that exist between the isolated circuitry sections and, finally, the communication is substantially insensitive to or undisturbed by noise sources in physical proximity to the isolating elements.
High voltage isolation barriers are commonly implemented by using magnetic fields, electric fields, or light. The corresponding signal communication elements are transformers, capacitors and opto-isolators. Transformers can provide high voltage isolation between primary and secondary windings, and also provide a high degree of rejection of lower voltage signals that exist across the barrier, since these signals appear as common mode in transformer isolated circuit applications. For these reasons, transformers have been commonly used to interface modem circuitry to the standard, two-wire telephone network. In modem circuitry, the signal transferred across the barrier is typically analog in nature, and signal communication across the barrier is supported in both directions by a single transformer. However, analog signal communication through a transformer is subject to low frequency bandwidth limitations, as well as distortion caused by core nonlinearities. Further disadvantages of transformers are their size, weight and cost.
The distortion performance of transformer coupling can be improved while reducing the size and weight concerns by using smaller pulse transformers to transfer a digitally encoded version of the analog information signal across the isolation barrier, as disclosed in U.S. Pat. No. 5,369,666, xe2x80x9cMODEM WITH DIGITAL ISOLATIONxe2x80x9d (incorporated herein by reference). However, two separate pulse transformers are disclosed for bidirectional communication with this technique, resulting in a cost disadvantage. Another disadvantage of transformer coupling is that additional isolation elements, such as relays and opto-isolators, are typically required to transfer control signal information, such as phone line hookswitch control and ring detect, across the isolation barrier, further increasing the cost and size of transformer-based isolation solutions.
Because of their lower cost, high voltage capacitors have also been commonly used for signal transfer in isolation system circuitry. Typically, the baseband or low frequency analog signal to be communicated across the isolation barrier is modulated to a higher frequency, where the capacitive isolation elements are more conductive. The receiving circuitry on the other side of the barrier demodulates the signal to recover the lower bandwidth signal of interest. For example, U.S. Pat. No. 5,500,895, xe2x80x9cTELEPHONE ISOLATION DEVICExe2x80x9d (incorporated herein by reference) discloses a switching modulation scheme applied directly to the analog information signal for transmission across a capacitive isolation barrier. Similar switching circuitry on the receiving end of the barrier demodulates the signal to recover the analog information. The disadvantage of this technique is that the analog communication, although differential, is not robust. Mismatches in the differential components allow noise signals, which can capacitively couple into the isolation barrier, to easily corrupt both the amplitude and timing (or phase) of the analog modulated signal, resulting in unreliable communication across the barrier. Even with perfectly matched components, noise signals can couple preferentially into one side of the differential communication channel. This scheme also requires separate isolation components for control signals, such as hookswitch control and ring detect, which increase the cost and complexity of the solution.
The amplitude corruption concern can be eliminated by other modulation schemes, such as U.S. Pat. No. 4,292,595, xe2x80x9cCAPACITANCE COUPLED ISOLATION AMPLIFIER AND METHOD,xe2x80x9d which discloses a pulse width modulation scheme; U.S. Pat. No. 4,835,486 xe2x80x9cISOLATION AMPLIFIER WITH PRECISE TIMING OF SIGNALS COUPLED ACROSS ISOLATION BARRIER,xe2x80x9d which discloses a voltage-to-frequency modulation scheme; and U.S. Pat. No. 4,843,339 xe2x80x9cISOLATION AMPLIFIER INCLUDING PRECISION VOLTAGE-TO-DUTY CYCLE CONVERTER AND LOW RIPPLE, HIGH BANDWIDTH CHARGE BALANCE DEMODULATOR,xe2x80x9d which discloses a voltage-to-duty cycle modulation scheme. (All of the above-referenced patents are incorporated herein by reference.) In these modulation schemes, the amplitude of the modulated signal carries no information and corruption of its value by noise does not interfere with accurate reception. Instead, the signal information to be communicated across the isolation barrier is encoded into voltage transitions that occur at precise moments in time. Because of this required timing precision, these modulation schemes remain analog in nature. Furthermore, since capacitively coupled noise can cause timing (or phase) errors of voltage transitions in addition to amplitude errors, these modulation schemes remain sensitive to noise interference at the isolation barrier.
Another method for communicating an analog information signal across an isolation barrier is described in the Silicon Systems, Inc. data sheet for product number SSI73D2950. (See related U.S. Pat. Nos. 5,500,894 for xe2x80x9cTELEPHONE LINE INTERFACE WITH AC AND DC TRANSCONDUCTANCE LOOPSxe2x80x9d and 5,602,912 for xe2x80x9cTELEPHONE HYBRID CIRCUITxe2x80x9d, both of which are incorporated herein by reference.) In this modem chipset, an analog signal with information to be communicated across an isolation barrier is converted to a digital format, with the amplitude of the digital signal restricted to standard digital logic levels. The digital signal is transmitted across the barrier by means of two, separate high voltage isolation capacitors. One capacitor is used to transfer the digital signal logic levels, while a separate capacitor is used to transmit a clock or timing synchronization signal across the barrier. The clock signal is used on the receiving side of the barrier as a timebase for analog signal recovery, and therefore requires a timing precision similar to that required by the analog modulation schemes. Consequently one disadvantage of this approach is that noise capacitively coupled at the isolation barrier can cause clock signal timing errors known as jitter, which corrupts the recovered analog signal and results in unreliable communication across the isolation barrier. Reliable signal communication is further compromised by the sensitivity of the single ended signal transfer to voltages that exist between the isolated circuit sections. Further disadvantages of the method described in this data sheet are the extra costs and board space associated with other required isolating elements, including a separate high voltage isolation capacitor for the clock signal, another separate isolation capacitor for bidirectional communication, and opto-isolators and relays for communicating control information across the isolation barrier.
Opto-isolators are also commonly used for transferring information across a high voltage isolation barrier. Signal information is typically quantized to two levels, corresponding to an xe2x80x9conxe2x80x9d or xe2x80x9coffxe2x80x9d state for the light emitting diode (LED) inside the opto-isolator. U.S. Pat. No. 5,287,107 xe2x80x9cOPTICAL ISOLATION AMPLIFIER WITH SIGMA-DELTA MODULATIONxe2x80x9d (incorporated herein by reference) discloses a delta-sigma modulation scheme for two-level quantization of a baseband or low frequency signal, and subsequent communication across an isolation barrier through opto-isolators. Decoder and analog filtering circuits recover the baseband signal on the receiving side of the isolation barrier. As described, the modulation scheme encodes the signal information into on/off transitions of the LED at precise moments in time, thereby becoming susceptible to the same jitter (transition timing) sensitivity as the capacitive isolation amplifier modulation schemes.
Another example of signal transmission across an optical isolation barrier is disclosed in U.S. Pat. No. 4,901,275 xe2x80x9cANALOG DATA ACQUISITION APPARATUS AND METHOD PROVIDED WITH ELECTRO-OPTICAL ISOLATIONxe2x80x9d (incorporated herein by reference). In this disclosure, an analog-to-digital converter, or ADC, is used to convert several. multiplexed analog channels into digital format for transmission to a digital system. Opto-isolators are used to isolate the ADC from electrical noise generated in the digital system. Serial data transmission across the isolation barrier is synchronized by a clock signal that is passed through a separate opto-isolator. The ADC timebase or clock, however, is either generated on the analog side of the barrier or triggered by a software event on the digital side of the barrier. In either case, no mechanism is provided for jitter insensitive communication of the ADC clock, which is required for reliable signal reconstruction, across the isolation barrier. Some further disadvantages of optical isolation are that opto-isolators are typically more expensive than high voltage isolation capacitors, and they are unidirectional in nature, thereby requiring a plurality of opto-isolators to implement bidirectional communication.
In addition, direct access arrangement (DAA) circuitry including isolation barriers may be used to terminate the telephone connections at the user""s end and may include, for example, an isolation barrier, DC termination circuitry, AC termination circuitry, ring detection circuitry, and processing circuitry that provides a communication path for signals to and from the phone lines. The DC impedance that the DAA circuitry presents to the telephone line (typically xe2x89xa6300xcexa9) is required by regulations to be less than the AC impedance that the DAA circuitry presents to the telephone line (typically =600xcexa9). Consequently, inductive behavior is required from the section of the DAA circuitry that sinks DC loop current, which is typically called the DC holding circuitry. This inductive behavior of the DC holding circuitry should provide both high impedance and low distortion for voiceband signals.
Prior techniques for implementing DC holding circuitry have included bipolar transistor (e.g. PNP transistor) implementations. These prior techniques, however, have suffered from various disadvantages. For example, although bipolar transistor implementations typically present a desired high impedance (e.g.,  greater than  greater than 600xcexa9) to the telephone network for voiceband signals, such implementations are limited. In contrast, a CMOS design would be preferable because CMOS technology allows a high level of integration, for example with other phone line interface functions. CMOS implementations on CMOS integrated circuits, however, may face considerable problems in dissipating the power consumed by the DC holding circuitry.
The present invention provides a CMOS implementation for DC holding circuitry in DAA circuitry that achieves the desired inductive behavior while minimizing the power dissipation required by the CMOS integrated circuit, particularly at high loop currents. The DC holding circuitry may include MOS transistors located on a CMOS integrated circuit and an off-chip resistor that acts to dissipate power external to the CMOS integrated circuit. The CMOS implementation of the present invention also allows a path for drawing DC current to power other CMOS circuits (e.g., ADCs and DACs) in the CMOS integrated circuit.
In one general respect, the present invention is a communication system including phone line side circuitry that may be coupled to phone lines, powered side circuitry that may be coupled to the phone line side circuitry through an isolation barrier, and a DC holding circuit within the phone line side circuitry including a power dissipating resistor coupled external to an integrated circuit chip interface of the phone line side circuitry.
In a further embodiment, the isolation barrier is coupled between the phone line side circuitry and the powered side circuitry. Still further, the isolation barrier may comprise one or more capacitors and the information communicated across the isolation barrier may be digital. In a more detailed embodiment, the DC holding circuitry of the communication system may include a MOS transistor and an operational amplifier connected to two voltage supplies.
In another general respect, the present invention is a method for reducing power dissipation requirements for a communication system including coupling an isolation barrier between powered side circuitry and phone line side circuitry that may be coupled to phone lines, providing a DC holding circuit within the phone line side circuitry that may be coupled to receive current from the phone lines, and dissipating power within the DC holding circuit with a resistor that is coupled external to an integrated circuit chip interface of the phone line side circuitry.
In a further embodiment, the isolation barrier may be capacitive and information transmitted across the isolation barrier may be digital. In a more detailed embodiment, the dissipating step may include positioning a MOS transistor within a current path of the DC holding circuit, generating an internal power supply for the integrated circuit, and coupling an external power dissipating resistor to the MOS transistor.
In a further general respect, the present invention is a DC holding circuit for reducing power dissipation requirements of an integrated circuit within a communication system that may be connected to phone lines including power supply circuitry providing an internal DC supply voltage for the integrated circuit and a power dissipating resistor coupled to the power supply circuitry and coupled external to the chip interface of the integrated circuit.
In a more detailed embodiment, the power supply circuitry may include a MOS transistor and the power dissipating resistor may be connected within a current path of the MOS transistor but outside of a current path of the internal DC supply voltage. Further, the power supply circuitry may also include a first and a second voltage supplies and an operational amplifier.
In still another general respect, the present invention is a method for reducing power dissipation requirements for an integrated circuit within a communication system that may be connected to phone lines including providing a DC holding circuit that may receive current from phone lines, generating an internal DC supply voltage for the integrated circuit with the DC holding circuit, and coupling an external power dissipating resistor to the power supply circuitry and connected external to the chip interface of the integrated circuit.
In a further embodiment, the coupling step further includes positioning the power dissipating resistor outside of a current path for the internal DC supply voltage. Still further, the generating step may include providing a first and a second voltage supplies.